1. Field of the Invention
The invention relates to a semiconductor device in which both an n-channel MOSFET and a p-channel MOSFET are formed and a method for manufacturing the same.
2. Background Art
Although gate insulating films are being made thinner to ensure the drain current in semiconductor devices in which MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are formed, making the gate insulating film thinner unfortunately increases the leak current due to tunneling. Therefore, the silicon oxide film and the silicon oxynitride film conventionally used as the gate insulating film have reached the physical limitations of film thickness reductions.
Therefore, to suppress the leak current while making the effective gate insulating film thinner, technology to form the gate insulating film of a high dielectric constant material, that is, technology using a so-called high-k gate insulating film, has been proposed. Materials having dielectric constants higher than the dielectric constants of silicon oxide and silicon oxynitride, e.g., HfO2, HfSiO, and the like, may be used as the high dielectric constant material. Thereby, the electrical film thickness can be made thinner while maintaining a thick physical film thickness, and the drain current can be increased while suppressing the leak current.
On the other hand, in conventional gate electrodes made of polysilicon containing an impurity, a depletion layer undesirably forms around the interface with the gate insulating film, and the effective gate insulating film unfortunately increases. Therefore, technology using a metal electrode as the gate electrode has been proposed. Thus, the effective film thickness of the gate insulating film can be made thinner by using a high-k gate insulating film as the gate insulating film and using a metal electrode as the gate electrode.
However, in the case where such a high-k gate insulating film and metal gate electrode are used in a CMOS (Complementary MOSFET), the control of the threshold voltage of each of the MOSFETs is problematic. In other words, while the threshold voltage of a MOSFET depends on the work function of the material forming the gate electrode, the optimal work function of the electrode material differs for an n-channel MOSFET (hereinbelow also referred to as “nMOS”) and a p-channel MOSFET (hereinbelow also referred to as “pMOS”). Specifically, it is necessary that the electrode material has a work function near the conduction band of silicon (about 4.05 eV) to reduce the threshold voltage of an nMOS; and it is necessary that the electrode material has a work function near the valence band of silicon (about 5.15 eV) to reduce the threshold voltage of a pMOS. Therefore, using an electrode material having a small work function to reduce the threshold voltage of the nMOS undesirably increases the threshold voltage of the pMOS; and using an electrode material having a large work function to reduce the threshold voltage of the pMOS undesirably increases the threshold voltage of the nMOS.
Therefore, technology has been proposed to use mutually different materials for the electrode material of the gate electrode of the nMOS and the electrode material of the gate electrode of the pMOS. For example, JP-A 2008-537359 (Kohyo) discusses technology to form the gate electrode of the nMOS from a metal having a work function of less than 4.2 eV and forming the gate electrode of the pMOS from a metal having a work function exceeding 4.9 eV. However, such a method requires separately forming the gate electrodes of the nMOS and the pMOS. Therefore, the manufacturing process of the semiconductor device is complex, and the manufacturing costs unfortunately increase.